The Arria 10 SoCs integrate an ARM-based hard processor system (HPS) consisting of processor, peripherals, and memory interfaces with the FPGA fabric using a high-bandwidth interconnect backbone. It combines the performance and power savings of hard intellectual property (IP) with the flexibility of programmable logic. The Arria 10 SoCs, based on TSMC’s 20 nm process technology, combine a dual-core ARM Cortex-A9 MPCore HPS with industry-leading programmable logic technology that includes hardened floating-point digital signal processing (DSP) blocks.


 The MAX System on Module supports Intels® Arria® 10 FPGA family and provides the architecture on  a very compact embedded board. The Arria 10 SoC-FPGA in F34 footprint (1152 pins) provides 23 transceivers with data rate up to 17.4 GBit/s, connected via Samtec high speed connectors to the baseboard. The MAX SoM can be populated optionally with 480KLE, 570KLE and 660KLE Arria 10 SoC-FPGAs.

In terms of external memory two DDR3 SDRAM banks (32 bit wide) with up to 4GByte each bank are available. One memory bank is dedicated to the Hard Processor System (HPS), the 2nd memory bank is dedicated to the FPGA. A 1GBit QSPI configuration flash device can be used to configure the FPGA, for Operating System and application software 4GByte of eMMC NAND Flash are available.

MAX operates based on a single voltage power supply of 12V. All necessary on-board voltages are generated on MAX. For monitoring of essential system parameter a dedicated FPGA provides the values for current, voltage and temperature via I²C.

For most flexible clocking two programmable clock sources are implemented.

4 Samtec connectors connect MAX to the baseboard. Two SEAF connector, 200 pins each, provide the FPGA I/O signals, two QRF8 connectors provide he 24 transceiver channels to the application board. MAX offers 232 I/O pins as well as 52 HPS pins.